September 1 — NVIDIA recently officially unveiled its custom high-bandwidth memory technology, NVHBM, at Hot Chips 2026. The technology moves the memory controller from the main XPU chip to the base die located at the bottom of the HBM stack.

While this may appear to be little more than a simple “relocation,” it represents a targeted move against the value chains of the three major memory manufacturers—Samsung, SK hynix, and Micron. Analysts point out that manufacturing an HBM base die costs three to four times more than producing a conventional DRAM core, and NVHBM is seen as a key strategy for NVIDIA to capture a larger share of this value.

In conventional HBM architectures, the base die is primarily responsible for high-speed interface connectivity, while the memory controller occupies valuable die area on the main XPU chip. By integrating the memory controller into the base die, NVHBM allows the main compute die to free up as much as 25% of its area for compute units. Per-stack bandwidth is 30% higher than that of standard HBM4E, while power consumption is reduced by 15%, and the area required for the PHY and supporting circuitry is reduced by 67%.

More importantly, however, is the shift in value-chain economics. Under the traditional architecture, the three major memory manufacturers retain significant bargaining power through their integrated supply of base dies and DRAM cores. NVHBM disrupts this structure by having NVIDIA design the controller and interface within the base die, while the three memory manufacturers simply manufacture the components according to NVIDIA’s specifications. As a result, pricing power shifts from the memory suppliers to the company that designs the memory controller.

Amazon’s Annapurna Labs was reportedly the first to adopt NVHBM for its Trainium4 AI chip. MediaTek adopted the NVLink Fusion solution within just five days and received $3.5 billion in financial support from NVIDIA.

It is worth noting that HBM4E has not yet officially entered volume shipment, meaning that NVHBM is being compared against a benchmark technology that has not yet reached mass production. Its real-world performance therefore remains to be validated.

Nevertheless, NVIDIA’s objective is clear: by taking control of the base-die layer, the company aims to capture the value of the memory subsystem, provided that customers do not intend to develop their own compute dies. The three major memory manufacturers will continue to produce the DRAM cores, but the most profitable layer of the value chain may now belong to NVIDIA.